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Generated remediation guidance and an executive summary. No account required.
In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.
No affected products information available.
Use CWE-226 to widen CVE-2025-0647 into its surrounding weakness, vendor, and product context.